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期刊


ISSN1065-514X
刊名VLSI Design
参考译名超大规模集成电路设计
收藏年代2008～2018



全部

2008 2009 2010 2011 2012 2013
2014 2015 2016 2017 2018

2013, vol.2013

题名作者出版年年卷期
A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA DesignMao-Hsu Yen; Chu Yu; Horng-Ru Liao; Chin-Fa Hsieh20132013, vol.2013
Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAALA. Kishore Kumar; D. Somasundareswari; V. Duraisamy; T. Shunbaga Pradeepa20132013, vol.2013
Low Complexity Submatrix Divided MMSE Sparse-SQRD Detection for MIMO-OFDM with ESPAR Antenna ReceiverDiego Javier Reinoso Chisaguano; Minoru Okada20132013, vol.2013
Design a Bioamplifier with High CMRRYu-Ming Hsiao; Miin-Shyue Shiau; Kuen-Han Li; Jing-Jhong Hou; Heng-Shou Hsu; Hong-Chong Wu; Don-Gey Liu20132013, vol.2013
Verification of Mixed-Signal Systems with Affine Arithmetic AssertionsCarna Radojicic; Christoph Grimm; Florian Schupfer; Michael Rathmair20132013, vol.2013
Meta-Algorithms for Scheduling a Chain of Coarse-Grained Tasks on an Array of Reconfigurable FPGAsDinesh P. Mehta; Carl Shetters; Donald W. Bouldin20132013, vol.2013
A 0.6-V to 1-V Audio ΔΣ Modulator in 65 nm CMOS with 90.2 dB SNDR at 0.6-VLiyuan Liu; Dongmei Li; Zhihua Wang20132013, vol.2013
Energy-Efficient Hardware Architectures for the Packet Data Convergence Protocol in LTE-Advanced Mobile TerminalsShadi Traboulsi; Valerio Frascolla; Nils Pohl; Josef Hausner; Attila Bilgic20132013, vol.2013
FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix AddersDavid H. K. Hoe; L. P. Deepthi Bollepalli; Chris D. Martinez20132013, vol.2013
Design Example of Useful Memory Latency for Developing a Hazard Preventive Pipeline High-Performance Embedded-MicroprocessorChing-Hwa Cheng20132013, vol.2013
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