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期刊
ISSN
1751-8601
刊名
IET Computers & Digital Techniques
参考译名
IET计算机与数字技术
收藏年代
2007~2012
关联期刊
参考译名
收藏年代
IEE Proceedings
英国电气工程师学会论文集:计算机与数字技术
1999~2006
全部
2007
2008
2009
2010
2011
2012
2009, vol.3, no.1
2009, vol.3, no.2
2009, vol.3, no.3
2009, vol.3, no.4
2009, vol.3, no.5
2009, vol.3, no.6
题名
作者
出版年
年卷期
Adaptive error control for nanometer scale network-on-chip links
Q. Yu; P. Ampadu
2009
2009, vol.3, no.6
Inversion schemes for sublithographic programmable logic arrays
B. Gojman; H. Manem; G. S. Rose; A. DeHon
2009
2009, vol.3, no.6
Low-power hybrid complementary metal-oxide-semiconductor-nano-electro-mechanical systems field programmable gate array: circuit level analysis and defect-aware mapping
R. S. Chakraborty; S. Paul; Y. Zhou; S. Bhunia
2009
2009, vol.3, no.6
Hybrid NEMS-CMOS integrated circuits: a novel strategy for energy-efficient designs
H. F. Dadgour; K. Banerjee
2009
2009, vol.3, no.6
Is triple modular redundancy suitable for yield improvement?
J. Vial; A. Virazel; A. Bosio; P. Girard; C. Landrault; S. Pravossoudovitch
2009
2009, vol.3, no.6
Defect-tolerant N~2-transistor structure for reliable nanoelectronic designs
A. H. El-Maleh; B. M. Al-Hashimi; A. Melouki; F. Khan
2009
2009, vol.3, no.6
Connecting fabrication defects to fault models and simulation program with integrated circuit emphasis simulations for DNA self-assembled nanoelectronics
V. Mao; V. Thusu; C. Dwyer; K. Chakrabarty
2009
2009, vol.3, no.6
Application modelling and hardware description for network-on-chip benchmarking
E. Salminen; C. Grecu; T. D. Hamalainen; A. Ivanov
2009
2009, vol.3, no.5
Processing while routing: a network-on-chip-based parallel system
S. R. Fernandes; B. C. Oliveira; M. Costa; I. S. Silva
2009
2009, vol.3, no.5
Memory-centric network-on-chip for power efficient execution of task-level pipeline on a multi-core processor
D. Kim; K. Kim; J. Y. Kim; S. Lee; H. J. Yoo
2009
2009, vol.3, no.5
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