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期刊


ISSN1350-2387
刊名IEE Proceedings
参考译名英国电气工程师学会论文集：计算机与数字技术
收藏年代1999～2006

关联期刊参考译名收藏年代
IET Computers & Digital TechniquesIET计算机与数字技术2007～2012


全部

1999 2000 2001 2002 2003 2004
2005 2006

2002, vol.149, no.1 2002, vol.149, no.3 2002, vol.149, no.4 2002, vol.149, no.5 2002, vol.149, no.6

题名作者出版年年卷期
Architectural design of a fast floating-point multiplication-add fused unit using signed-digit additionC. Chen; L. -A. Chen; J. -R. Cheng20022002, vol.149, no.4
Unified CORDIC-based chip to realise DFT/DHT/DCT/DSTB. Das; S. Banerjee20022002, vol.149, no.4
Genetic algorithm based state assignment for power and area optimisationY. Xia; A. E. A. Almaini20022002, vol.149, no.4
Exploring SOI device structures and interconnect architectures for low-power high-performance circuitsR. Zhang; K. Roy; C. -K. Koh; D. B. Janes20022002, vol.149, no.4
Complementary pass-transistor energy recovery logic for low-power applicationsR. C. Chang; P. -C. Hung; I. -H. Wang20022002, vol.149, no.4
Bus encoding architecture for low-power implementation of an AMBA-based SoC platformS. Osborne; A. T. Erdogan; T. Arslan; D. Robinson20022002, vol.149, no.4
Code compression architecture for cache energy minimisation in embedded systemsL. Benini; A. Macii; A. Nannarelli20022002, vol.149, no.4
Power and performance exploration of embedded systems executing multimedia kernelsM. Dasygenis; N. Kroupis; K. Tatas; A. Argyriou; D. Soudris; A. Thanailakis20022002, vol.149, no.4
Current dynamics-based macro-model for power simulation in a complex VLIW DSP processorR. Muresan; C. Gebotys20022002, vol.149, no.4
Analysing trade-offs in scan power and test data compression for systems-on-a-chipP. M. Rosinger; P. T. Gonciari; B. M. Al-Hashimi; N. Nicolici20022002, vol.149, no.4



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