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期刊

ISSN	0741-3106
刊名	IEEE Electron Device Letters
参考译名	IEEE电子器件快报
收藏年代	1998～2007

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2005, vol.26, no.1	2005, vol.26, no.10	2005, vol.26, no.11	2005, vol.26, no.12	2005, vol.26, no.2	2005, vol.26, no.3
2005, vol.26, no.4	2005, vol.26, no.5	2005, vol.26, no.6	2005, vol.26, no.7	2005, vol.26, no.8	2005, vol.26, no.9
2005, vol.26, no.9 2

题名

作者

出版年

年卷期

Reduction of Leakage Current in Metal-Induced Lateral Crystallization Poly silicon TFTs With Dual-Gate and Multiple Nanowire Channels

Yung-Chun Wu; Ting-Chang Chang; Po-Tsun Liu; Cheng-Wei Chou; Yuan-Chun Wu; Chun-Hao Tu; Chun-Yen Chang

2005

2005, vol.26, no.9 2

psub Guard Ring Design and Modeling for the Purpose of Substrate Noise Isolation in the SOC Era

Tsun-Lai Hsu; Yu-Chia Chen; Hua-Chou Tseng; Victor Liang; Jin Shyong Jan

2005

2005, vol.26, no.9

Highly Scalable Saddle MOSFET for High-Density and High-Performance DRAM

Ki-Heung Park; Kyoung-Rok Han; Jong-Ho Lee

2005

2005, vol.26, no.9

A New Oxide Trap-Assisted NBTI Degradation Model

Neeraj K. Jha; V. Ramgopal Rao

2005

2005, vol.26, no.9

Evidence of Reduced Self-Heating in Strained Si MOSFETs

Gareth Nicholas; Tim J. Grasby; Evan H. C. Parker; Terry E. Whall; Thomas Skotnicki

2005

2005, vol.26, no.9

Gate-Assisted High-Q-Factor Junction Varactor

J.-H. Gau; R.-T. Wu; Steven Sang; C.-H. Kuo; T.-L. Chang; H.-H. Chen; Anchor Chen; Joe Ko

2005

2005, vol.26, no.9

Optimum Crystallographic Alignment for Si n-Channel Ballistic DGFETs

S. E. Laux

2005

2005, vol.26, no.9

Channel Backscattering Characteristics of Uniaxially Strained Nanoscale CMOSFETs

Hong-Nien Lin; Hung-Wei Chen; Chih-Hsin Ko; Chung-Hu Ge; Horng-Chih Lin; Tiao-Yuan Huang; Wen-Chin Lee

2005

2005, vol.26, no.9

Analytic Model for the Post-Breakdown Conductance of Sub-5-nm SiO{sub}2 Gate Oxides

E. Miranda

2005

2005, vol.26, no.9

Performance Evaluation of Field-Enhanced P-Channel Split-Gate Flash Memory

Wen-Ting Chu; Hao-Hsiung Lin; Yu-Hsiimg Wang; Chia-Ta Hsieh; Yung-Tao Lin; Chung S. Wang

2005

2005, vol.26, no.9

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